V

VHDL

Z80 @10 MHz PoC for Altera Cyclone II and Cyclone IV (DE0-Nano board) FPGAs

A library to represent and manipulate Hardware Description Language (HDL) block designs in Python

https://hdl-block-design.readthedocs.io/en/latest/

VHDL generator for Gowin pROM IP Core

Simple SDRAM test for Cyclone FPGA in VHDL

A VHDL synthesizable and behavioral FIFO design.

An 16bit CPU written in VHDL, compile with GHDL.

Projeto do MI - Sistemas Digitais

Create fast Fourier transform (FFT) processing hardware for your FPGA or CPLD. Use this tool to create an FFT core of any width or length. Customize to your project's needs. FFT hardware is generated in the SystemVeilog (SV) hardware description language (HDL).